In most conventional data processing systems, communication between a central, or host, processing unit and one or more peripheral I/O devices, such as large capacity storage devices of the tape or disc type, display devices, card readers, and the like, is normally achieved by means of an I/O bus to which all of the I/O devices have access. Normally when access to the host processor or to the host main memory is required by an external I/O device, the latter device must generate an "interrupt" signal which must then be appropriately processed by the central processor unit to identify the I/O unit and to determine what operation the interrupting unit requires the host processor to perform. The host processor must stop its operation, i.e. interrupt its present machine state, in order to process the interrupt signal. That is, the host processor must identify the interrupting device, must perform whatever data handling is required, and must restore the host processor to its previous machine state so that it can resume the operation it was performing prior to interruption. The processing of such an interrupt signal normally requires a relatively long time period before the processor is ready to resume its previous operation.
In order to avoid the excessive time required for such interrupt processing, it has been suggested that a separate processor unit, commonly designated as an I/O processor, be utilized as an intermediary between external I/O devices and the main, or host, processor unit. Such I/O processor is normally provided access to the host I/O bus and, in turn, has its own I/O bus to which access can be obtained by one or more peripheral I/O devices. In such a way the I/O processor performs the processing which is required when an interrupt signal is transmitted from an I/O device so that the main or host processing unit is not required to stop its operation for such interrupt signal processing. The I/O processor thereupon takes care of the transfer of data to or from the I/O device and, thence, to or from the main processor unit or the main memory of the host machine. The host processor then merely handles the I/O data manipulations only, which manipulations can be achieved at the host processor high speed of operation, the data transfer to and from the I/O devices being handled by the separate I/O processor.
The I/O processor often has its own local memory, usually of relatively low storage capacity which provides for the storage of programs for processing interrupts and for the local storage of data before transfer either to or from the host processor or to or from the I/O device.
In such presently used systems, the I/O processor must interrupt the host processor (in effect, on behalf of the I/O devices), to provide a particular memory allocation which is required by the I/O processor or by the IOP I/O devices utilizing host memory. While the interrupt processing which must occur in the host processor is not nearly as extensive as it would be if the host processor were dealing with the I/O devices directly, there is still a certain amount of interrupt processing time that must be used by the host processor in order to define the extent of the interrupt service which has to be performed. It is desirable to minimize the processing time that the host processor must use for such purpose so that it can return to its normal operations as quickly as possible, even when using a separate I/O processor.
Further, if more than one I/O processor is used on the host I/O bus, a priority among them must be established with respect to use of the host I/O bus. For example, if an I/O Processor is performing a Read-Modify-Write operation such processor must inform all other processors that such operation is occurring so that the I/O processor performing such operation can complete the operation before the host I/O bus becomes available to all other I/O processors.